AM5706

ACTIVE

Sitara processor: cost optimized Arm Cortex-A15 & DSP and secure boot

Product details

CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 1000 Coprocessors 4 Arm Cortex-M4 Protocols Ethernet, ICSS, Profibus, Profinet PCIe 2 PCIe Gen 2 Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Catalog Power supply solution LP8733 + LP873220, TPS65916 Operating temperature range (°C) -40 to 105 Edge AI enabled No
CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 1000 Coprocessors 4 Arm Cortex-M4 Protocols Ethernet, ICSS, Profibus, Profinet PCIe 2 PCIe Gen 2 Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Catalog Power supply solution LP8733 + LP873220, TPS65916 Operating temperature range (°C) -40 to 105 Edge AI enabled No
FCCSP (CBD) 538 289 mm² 17 x 17
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • DDR3/DDR3L Memory Interface (EMIF) module
    • Supports up to DDR-1333 (667 MHz)
    • Up to 2GB across single chip select
  • 2x dual Arm® Cortex®-M4 co-processors (IPU1 and IPU2)
  • IVA-HD subsystem
    • 4K @ 15fps encode and decode support for H.264 CODEC
    • Other CODECs are up to 1080p60
  • Display subsystem
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
    • 2D and 3D graphics
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2x dual-core programmable real-time unit and industrial communication subsystem (PRU-ICSS)
  • Accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Available single-core PowerVR™ SGX544 3D GPU
  • Secure boot support
    • Hardware-enforced root-of-trust
    • Customer programmable keys
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Cryptographic acceleration support
    • Supports cryptographic cores
      • AES – 128/192/256-bits key sizes
      • 3DES – 56/112/168-bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • True random number generator
    • DMA support
  • Debug security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted execution environment (TEE) support
    • Arm TrustZone™ based TEE
    • Extensive firewall support for isolation
    • Secure DMA path and interconnect
    • Secure watchdog/timer/IPC
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Ethernet subsystem
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Five high-speed inter-integrated circuit (I2C) ports
  • HDQ™/1-wire® interface
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High-Speed USB 2.0 dual-role device
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 subsystem with 5-Gbps lane
    • One 2-lane Gen2-compliant port
    • or two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI™ CSI-2 camera serial interface
  • Up to 186 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • DDR3/DDR3L Memory Interface (EMIF) module
    • Supports up to DDR-1333 (667 MHz)
    • Up to 2GB across single chip select
  • 2x dual Arm® Cortex®-M4 co-processors (IPU1 and IPU2)
  • IVA-HD subsystem
    • 4K @ 15fps encode and decode support for H.264 CODEC
    • Other CODECs are up to 1080p60
  • Display subsystem
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
    • 2D and 3D graphics
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2x dual-core programmable real-time unit and industrial communication subsystem (PRU-ICSS)
  • Accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Available single-core PowerVR™ SGX544 3D GPU
  • Secure boot support
    • Hardware-enforced root-of-trust
    • Customer programmable keys
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Cryptographic acceleration support
    • Supports cryptographic cores
      • AES – 128/192/256-bits key sizes
      • 3DES – 56/112/168-bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • True random number generator
    • DMA support
  • Debug security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted execution environment (TEE) support
    • Arm TrustZone™ based TEE
    • Extensive firewall support for isolation
    • Secure DMA path and interconnect
    • Secure watchdog/timer/IPC
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Ethernet subsystem
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Five high-speed inter-integrated circuit (I2C) ports
  • HDQ™/1-wire® interface
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High-Speed USB 2.0 dual-role device
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 subsystem with 5-Gbps lane
    • One 2-lane Gen2-compliant port
    • or two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI™ CSI-2 camera serial interface
  • Up to 186 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)

AM570x Sitara™ processors are Arm applications processors built to meet the intense processing needs of modern embedded products.

AM570x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by a single-core Arm Cortex-A15 RISC CPU with Arm Neon™ extensions and TI C66x VLIW floating-point DSP cores. The Arm processor lets developers keep control functions separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

AM570x Sitara™ processors are Arm applications processors built to meet the intense processing needs of modern embedded products.

AM570x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by a single-core Arm Cortex-A15 RISC CPU with Neon extensions and TI C66x VLIW floating-point DSP cores. The Arm processor lets developers keep control functions separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

AM570x Sitara™ processors are Arm applications processors built to meet the intense processing needs of modern embedded products.

AM570x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by a single-core Arm Cortex-A15 RISC CPU with Arm Neon™ extensions and TI C66x VLIW floating-point DSP cores. The Arm processor lets developers keep control functions separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

AM570x Sitara™ processors are Arm applications processors built to meet the intense processing needs of modern embedded products.

AM570x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by a single-core Arm Cortex-A15 RISC CPU with Neon extensions and TI C66x VLIW floating-point DSP cores. The Arm processor lets developers keep control functions separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

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Special Notes

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet AM570x Sitara™ Processors datasheet (Rev. F) PDF | HTML 15 Apr 2019
* Errata AM571x (SR 2.1, 2.0, 1.0) and AM570x (SR 2.1, 2.0) Sitara Processors Errata (Rev. H) PDF | HTML 02 Jul 2024
* User guide AM571x and AM570x Sitara Processor Technical Reference Manual (Rev. K) PDF | HTML 14 May 2024
Application note HSR/PRP Solutions on Sitara Processors for Grid Substation Communication (Rev. A) PDF | HTML 30 Jan 2026
Application note Sitara Processor Power Distribution Networks: Implementation and Analysis (Rev. H) PDF | HTML 17 Oct 2025
Application note Industrial Communication Protocols Supported on TI Processors and MCUs (Rev. F) PDF | HTML 03 Sep 2025
White paper Securing Arm-Based Application Processors (Rev. F) PDF | HTML 26 Feb 2025
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 31 Jul 2023
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 24 May 2023
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 Feb 2023
Application note PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 11 Oct 2022
White paper Industry 4.0 서보 드라이브에 Sitara™ 프로세서 및 마이크로컨트롤러 활용 (Rev. C) PDF | HTML 12 Jan 2022
White paper 運用適合工業 4.0 Sitara™ 伺服驅動器的處理器與微控制器 (Rev. C) PDF | HTML 12 Jan 2022
White paper Utilizing Sitara Processors and Microcontrollers for Industry 4.0 Servo Drives (Rev. C) 06 Oct 2021
Application brief Adding Real-Time Communication to Linux (Rev. A) 07 May 2021
Application note Ethernet PHY Configuration Using MDIO for Industrial Applications (Rev. A) 07 May 2021
More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16 Dec 2020
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 06 Jan 2020
Application note AM57x Schematic Checklist (Rev. B) 09 Jul 2019
User guide AM570x BGA Escape Routing 18 Mar 2019
White paper Bringing deep learning to embedded systems (Rev. A) 26 Feb 2019
Application note Common EOS pitfalls in board design 13 Feb 2019
Application note AM57xx Hardware Design Guide PDF | HTML 25 Jan 2019
Application note PRU-ICSS Getting Started Guide on TI-RTOS (Rev. A) 18 Jan 2019
Application note PRU Read Latencies (Rev. A) 21 Dec 2018
Application note PRU-ICSS Getting Starting Guide on Linux (Rev. A) 10 Dec 2018
White paper Ensuring real-time predictability (Rev. B) 04 Dec 2018
White paper Secure Boot on embedded Sitara™ processors (Rev. A) 13 Oct 2018
User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 24 Sep 2018
Application note MMC DLL Tuning (Rev. B) 31 Jul 2018
Application note AM570x Thermal Considerations 07 Jun 2018
Application note AM570x Power Consumption Summary 26 Apr 2018
Application note AM570x Power Estimation Tool 04 Apr 2018
User guide PRU Assembly Instruction User Guide 16 Feb 2018
Application note 2D Object Recognition for Industrial Machine Vision with Processor SDK on Sitara 07 Feb 2018
Application note AM57xx BGA PCB Design 25 Aug 2017
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 Aug 2017
Application note IODELAY Application Note for AM57xx Devices (Rev. A) 03 Aug 2017
Application note Processor-SDK RTOS Power Management and Measurement 02 Aug 2017
Application note Processor SDK RTOS Audio Benchmark Starter Kit 12 Apr 2017
Application note AM571x Power Consumption Summary 27 Mar 2017
Technical article From zero to hero PDF | HTML 28 Feb 2017
Technical article How to efficiently move information through your factory PDF | HTML 28 Feb 2017
Application note DSPLIB for Processor SDK RTOS 04 Nov 2016
Application note AM57x Processor SDK Linux: Customization of Multicore Application to Run on a Ne 06 Oct 2016
Application note Keystone EDMA FAQ 01 Sep 2016
White paper Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 11 Aug 2016
Technical article Hypervisors in embedded systems PDF | HTML 07 Jul 2016
Technical article Control-level design challenges in smart factory automation systems PDF | HTML 20 May 2016
Technical article Expanding industrial communication development PDF | HTML 09 May 2016
Application note TI DSP Benchmarking 13 Jan 2016
Technical article There’s a core for that PDF | HTML 14 Oct 2015
Application note Plastic Ball Grid Array [PBGA] Application Note (Rev. B) 13 Aug 2015
White paper TI’s processors leading the way in embedded analytics 03 Mar 2015
White paper Mainline Linux™ ensures stability and innovation 27 Mar 2014
White paper Scalable Solutions for HMI 21 Nov 2013
White paper Linaro Speeds Development in TI Linux SDKs 27 Aug 2013
White paper The Yocto Project:Changing the way embedded Linux software solutions are develop 14 Mar 2013
User guide Flip Chip Ball Grid Array Package Reference Guide (Rev. A) 23 May 2005
Application note AN-1281 Bumped Die (Flip Chip) Packages (Rev. A) 01 May 2004

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  • Assembly location

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