How to detect P/E-Core in Intel Alder Lake CPU?

Question

Which logical processor belongs to the P-core group and which to E-core group?

My first idea was to just check the base clock for each logical processor and then assume that the lowest base clock belongs to E-core (according to intel specs E-cores always have a noticeable lower base clock than P-core).

I was hoping that checking HKEY_LOCAL_MACHINE\HARDWARE\DESCRIPTION\System\CentralProcessor in the Registry would be enough. Unfortunately ~MHz always contains base clock of P-core.

Suggest taking a look at Game Dev Guide for Alder Lake Performance Hybrid Architecture which includes non-Delphi code to get this information from some Windows APIs and the CPUID instruction. — Brian
– Brian, Commented Nov 13, 2021 at 16:25
Yes, this question is arguably incorrectly tagged. This is about Windows, hardware, CPUs. It's not about Delphi at all. — Andreas Rejbrand
– Andreas Rejbrand, Commented Nov 13, 2021 at 18:04
P=performance, E=efficiency - it's no surprise the former is clocked higher than the latter. — AmigoJack
– AmigoJack, Commented Nov 13, 2021 at 19:15
How can I distinguish between high- and low-performance cores/threads in C++? is about the general case. But the answers there basically just say you normally don't need to. There is apparently some CPUID difference, that's what some game anti-piracy systems have a problem with. (But the BIOS can hide that, so IDK.) — Peter Cordes
– Peter Cordes, Commented Nov 13, 2021 at 19:27
You could run a microbenchmark that depends on AH being renamed separately from RAX on the P cores but not the E cores, or something like that. How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent - Sandybridge-family still does partial reg renaming of high-8-bit registers, unless that was dropped for Ice Lake. So you could craft a loop that's much slower clock-for-clock on an E core by intentionally creating a false dependency for CPUs without partial-reg renaming. — Peter Cordes
– Peter Cordes, Commented Nov 13, 2021 at 19:29

janekb04 · Accepted Answer · 2022-11-05 12:45:17Z

15

The CPUID instruction gives information about the core, on which it is executed. It is different for P cores and E cores.

The CPUID on Alder Lake is family 6 model 0x9A for both cores when enabled. The CPUID is changed to family 6 model 0x97 when E cores are disabled and AVX512 is enabled.

CPUID leaf 7 EDX bit 15 indicates a hybrid design.

CPUID leaf 1A EAX bit 24-31 indicates the type of core, according to "Game Dev Guide for Alder Lake Performance Hybrid Architecture", https://www.intel.com/content/www/us/en/developer/articles/guide/alder-lake-developer-guide.html

See my discussion at https://www.agner.org/forum/viewtopic.php?f=1&t=79

edited Nov 5, 2022 at 12:45

janekb04

5,0757 gold badges30 silver badges63 bronze badges

answered May 15, 2022 at 5:30

A Fog

4,6661 gold badge34 silver badges34 bronze badges

Sign up to request clarification or add additional context in comments.

Collectives™ on Stack Overflow

How to detect P/E-Core in Intel Alder Lake CPU?

1 Answer 1

Comments

Linked

Hot Network Questions

Collectives™ on Stack Overflow

1 Answer 1

Comments

Linked

Related