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In design, the top level module A has two instantiation of another module B

module A (....);
B (.C(C1)...) inst1;
B (.C(C2)...) inst2;

The module B has some parameter which I would like to assign from the testbench using generate block.

//Testbench
module test_top ();
A (....) A1;
generate 
for (genvar k = 0; k<2; k++) begin
    defparam A1.instk.C = 0;
end
endgenerate 

The compilation on NCSIM is causing error on defparam statement. where by it is unable to get the path of the instance. May be it is because of the generate statement. Is it legal to use defparam inside genertate block ?

1 Answer 1

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Firstly, don't use defparam - it is deprecated. Instead, set parameters using the #( ... ) syntax.

Secondly, your instances of module B need to be in a generate loop if you wish to refer to them using a genvar.

Finally, if you did want to use hierarchical naming with generate then you have to name the block inside the generate statement. The $display in the initial block gives an example - the hierarchical name of I inside module instance A1.

For example:

module A #(integer WIDTH) (input [WIDTH-1:0] I, output [WIDTH-1:0] O);

  generate 
    for (genvar k = 0; k<WIDTH; k++) begin : BLOCK_NAME
      B #(.WIDTH(WIDTH),.BIT(k)) Binst (.I(I), .O(O[k]));
    end
  endgenerate 

endmodule

module B #(integer WIDTH, BIT) (input [WIDTH-1:0] I, output O);

  assign O = I[BIT];

endmodule

module test_top;

  reg [1:0]  I;
  wire [1:0] O;

  A #(.WIDTH(2)) A1 (.I(I), .O(O));

  initial
    $display("I[1]= %b", test_top.A1.BLOCK_NAME[1].Binst.I);

endmodule

http://www.edaplayground.com/x/4PyL

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3 Comments

how to provide different value of parameter "BIT" for Binst inside test_top module, where "module A" is not defined inside module "test_top" ?
@Sourabh Well, I guess you'd have to use defparam, then, but it would be better to refactor your code so that it wasn't necessary. My example shows how the hierarchical naming works with generate statements.
Minor correction: defparam is not deprecated yet, but it is scheduled for deprecation. See IEEE Std 1800-2012 § C.4.1 Defparam statements : "The practice of using defparam statements is highly discouraged.Engineers are encouraged to take advantage of the explicit inline parameter redefinition capability."

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