Questions tagged [processor]
The processor tag has no summary.
140 questions
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Does a processor consume more power to achieve the same performance when it's is hot than when it's cold?
I just had a random thought while observing the wattage of my laptop's CPU/GPU during a benchmark:
The processor's always being utilized at 100% during the benchmark. However, it was initially ...
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What is the minimum electrical ICs you need to have to start the AM69 SoC from TI?
I cannot post on TI Design Forum because I don't have a TI-valid company email address.
I willl therefore ask the question here.
Introduction
TI offers a new type of SoC. It's called AM69. It's latest ...
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Understanding Voltage Rails in High-End Processors [closed]
I have observed that high-end processors typically operate at relatively low voltage levels, often around 1.2V or even lower. I am curious to understand how such low voltage levels are sufficient for ...
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When does IF output Get Stored in IF/ID Register in RISC-V pipelining?
I'm working on pipelining in RISC-V and have a question about the timing of storing the IF stage output into the IF/ID register.
From what I understand, pipeline registers and sequential components ...
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Designing a 64-bit RISC processor in Verilog
Designing this is not a part of the curriculum for me and my friend right now.
We are just experimenting with Verilog after studying combinational and sequential circuits.
Code used:
ALU.v
...
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How many cycles of instructions are needed to execute RISC-V in a single cycle processor?
I've been looking at "single-cycle" processors such as PicoRV32, and I've noticed that barring textbook examples of single cycle processors with magical fully combinational and separate ...
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What is Flex Domain,Application Domain and Real Time domain in iMX SoC
I was looking into the iMX series processor information. i.MX93 and i.MX94 specifically.
I can see that the processor blocks are divided into 3.They are as follows.
Flex Domain
Application Domain
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Wrong solution to a short RISC-V exercise
We are told that a RISC-V exercise with no data forwarding executes the instruction add x3,x2,x1, followed by sw x3, 16(x8). My ...
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Which address bit width should I choose for my single cycle CPU (Logisim)
I am currently designing a MIPS single cycle CPU (32 bits) in Logisim
I have already implemented the PC, instruction memory, register file and ALU. Since it is a 32 bits system I understand that the ...
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Problem in executing the memory stage that can perform call, ret, pop, etc
I am trying to implement a Y86 processor for my college assignment.
This is my MemoryStage:
...
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How to ensure a simple power sequence of a processor without a PMIC?
I need to integrate a video processor on a PCBA (part number: AllWinner S3, overview). It requires several power rails, and the power sequence is as follows:
Power on:
Power off:
(page 380/384 of the ...
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Making a model of an Intel 80386
On the internet there are some die shots of the 80386 but I am having a hard time finding one that contains descriptions or interpretations of each of its components. I need to make a model, and for ...
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Is it possible to use a MOS 6502 with a AE29F2008?
I wanted to buy a MOS 6502, but before that, wanted to know if it is possible to interface it with an AE29F2008 memory (recovered from a PC). The problem is that the AE29F2008 has three address pins ...
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Necessary components for diy ATMega328
I am trying to build a barebones avr based circuit, based on designs i found on the internet.
My questions are based on this sub-circuit:
I don't plan on using a Reset button, thus S1 will be omitted. ...
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Is FLOP/s for a GPU constant with varied VRAM utilization?
Meaning is the compute output of a GPU a function of total VRAM being used, or perhaps any other variable?
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