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Questions tagged [digital-logic]

Digital electronics treats discrete signals, unlike analog electronics which treats continuous signals. Digital logic is used to perform arithmetic operations with electric signals and constitutes the base for building CPUs.

3 votes
1 answer
53 views

Confused Between PTL and CMOS Implementation in OR(A,B,C) Logic

I’m a test checker for an Introduction to Digital Electronics course, and I’m currently reviewing student tests. The students were asked to implement the logic function OR(A, B, C) using PTL (Pass ...
Ben Shaines's user avatar
2 votes
3 answers
434 views

Design a system that receives X and X+2 as inputs and outputs X+1, without using adders or subtractors

I was asked to design a digital system that receives two inputs: X and X+2, and must output X+1, without using any adders or subtractors. (We weren't told what is the number of bits for X and X+2) I ...
Ben Shaines's user avatar
3 votes
3 answers
294 views

3 or 4-digit BCD to binary converter [duplicate]

While working on Digital logic, I encountered the problem of using a BCD switch to enter a binary number. For example, using a BCD switch, I can enter the number 117, which would be inserted into the ...
user992197's user avatar
2 votes
3 answers
296 views

Can I provide ADC's DVDD to power other digital components in the pcb

I am using AD5941 in my design. AD5941 AVDD and DVDD are powered separately using two regulators . Same LDO P/N is used.One for powering AVDD and the other for Powering DVDD. In my board, I have ...
Confused's user avatar
  • 4,011
0 votes
1 answer
52 views

Why are pull-up resistors provided on the UART lines of the AM62L EVM?

I was reviewing the AM62L EVM (Evaluation Module) schematic and noticed that the UART lines (TX, RX) have external pull-up resistors to 3.3 V. However, when I checked the AM62L datasheet and technical ...
akash Pulikkal's user avatar
4 votes
2 answers
162 views

NMOS and PMOS in a series with VDD as voltage source, what will be the voltage between them?

I have an argument with a friend regarding the voltage between N and P and the voltage at OUT. I say that for A = '1' and B = '0': If Kn > Kp, so the voltage between the NMOS and PMOS is Vdd-Vtn ...
Ben Shaines's user avatar
-8 votes
0 answers
64 views

digital electronics [closed]

Q1. (Resistive Load Inverter Analysis) Draw the VTC of the inverter in Figure 1. Use the following technology parameters. Lmin = 60 nm Vro,p= -0.42V MpCox = 51.6uA/V2 (W/L)=1 VDD VINO _VoUT + V. R ...
kerolol1903's user avatar
6 votes
3 answers
1k views

12 Volt Logic Gates

Are there any such components as a 12 volt NOR gate or similar?
jab1948's user avatar
  • 63
2 votes
3 answers
149 views

How to bypass auto off on digital scale PCB?

I have a digital scale with built in auto off timeout function pictured, is there a way to hack modify this PCB to bypass the auto off function after timeout? So when batteries are inserted it will ...
wdbwdb1's user avatar
  • 601
1 vote
1 answer
63 views

Controlling a motor driver with a single push button

I would like to have a circuit that could control an existing DC motor driver (without any datasheet) from a single push button. A long press would activate the driver, and short presses would switch ...
baptistedftn's user avatar
0 votes
5 answers
275 views

How to do 24V to 3.3V logic level shifting? [closed]

I'm getting into electrical circuits. I have a RGB LED strip with a 24 V common. I want to input the RGB signals into a microcontroller that has a 3.3V logic. What I have found online is to either use ...
Achen's user avatar
  • 11
3 votes
2 answers
123 views

JK flip flop behavior on startup in Verilog

I've tried to implement a JK flip flop in Verilog, but while testing, I found that whatever inputs of j and k I give on startup, until I reset the flip flop (j=0, k=1), the outputs will not be seen ...
Samy R.'s user avatar
  • 31
1 vote
3 answers
150 views

Is it possible to simplify 555 delay circuit?

Is it possible to simplify the circuit by removing the logical NOTs while maintaining the identical output response to the input signal?
Arseniy's user avatar
  • 2,317
0 votes
2 answers
131 views

How to design a circuit to level-shift a 3.3V MCU output to selectable push-pull or open-drain outputs (3.3V / 5V / 12V / 24V)?

I need to design a circuit that can take a digital output from an MCU (3.3V) and amplify it to a selectable output voltage. The output voltage should be configurable between 3.3V, 5V, 12V, and 24V. ...
StBlub's user avatar
  • 11
0 votes
2 answers
102 views

How to drive the base of a PNP with a thyristor?

There are some reference and logic circuits before the opamp. When the opamp output = HIGH, it triggers the thyristor. I used a thyristor because I want it to not only latch but stays constantly ...
Michael George's user avatar

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