Questions tagged [polygon]
The polygon tag has no summary.
49 questions
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Why Altium Rules custom query behaves strangely?
I'm defining a clearance rule in Altium PCB. The desired result is to have a 0.1 mm clearance between GND polygon GND_L and Keep-Out layer element created by "Create Primitives From Board Shape.&...
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Handling Dead Copper in Internal Power Planes [duplicate]
I am working on a 4-layer PCB (1200 mil × 1000 mil) with TOP, GND, 3.3V midlayer, and Bottom. I encountered a situation where, if I pour the polygon all over the entire midlayer while removing dead ...
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RF Microstrip trace polygon
I'm designing a board with an RF L-band trace (around 2.150GHz) on the top layer side. I have a clear and unbroken ground plane on the bottom layer of the trace. However, I'm curious to know whether ...
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Altium CircuitMaker - Polygon Pour issue - Does not apper
I impored a model from Altium Designer into Altium CircuitMaker.
When I updated my Polygon Pour, then the total orange area (GND plane) disappear. But it's still ...
- 1,466
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Via capacitor placement strategies for bypass capacitors
In the image provided, four different locations for Via that connect the power plan to the bypass capacitors are illustrated. My query pertains to determining the most effective model for delivering ...
- 116
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Eagle won't route airwire to a polygon orphan
On the top GND polygon, I have orphans turned off, yet somehow I'm still getting a polygon on Q1's GND. Eagle won't route a wire to this orphan. I've turned orphans on/off and ratsnest, but nothing ...
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393
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Trace widths and current capability Altium
I was working on a PCB where there was a single DC input with two traces +ve and -ve. At one end there was a connection to a motor which requires 40A. The traces of the DC input were 100mil and 1oz. ...
user340506
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How can I set a clearance in my polygons? Because there is an error of short circuit between poly of GND or 5V and my vias
I tried to solve these errors using blind and buried vias, but the errors persist. I want when I repour the poly, it creates a clearance between the vias and poly. Or another solutions for the error. ...
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Altium hatched polygon not covering whole PCB on one layer
I have a two layer PCB on which I want to use hatched polygons on top and bottom layers. For some reason the hatched GND polygon on the bottom layer is not covering the whole layer.
PCB Layout
Bottom ...
- 339
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Polygon covers some part of the footprint
I am using Eagle for PCB and can't solve this issue. Polygon gets inside the footprint. I tried changing isolate and width parameters but the larger the distance or width, the more airwire errors pop ...
- 367
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Altium rules for autoconnecting a polygon to LQFP like pins
The image shows that the GND pins are not connected to pins near pads with no similar net around them. What I am looking for is defining or changing rules so that Altium would be able to do so on ...
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When and why is it important to route with polygons vs. traces?
I'm (still) a relative beginner in PCB layout. I'm trying to understand in what scenarios it's important to route with polygon areas instead of traces, and in those scenarios, just how important it ...
- 2,562
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Polygon covering footprints [closed]
I am new at designing, when I pouring copper in the polygon, it covers the footpring:
BTW, there is any option to edit footprint from the web?
At the picture above there isnt "Top overlay" ...
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Eagle PCB Polygon GND width
I am trying to convert 24V to 3.3V for my PCB design. 2 loads using 24V 3A, so I am using 60 Width (53.8 enough in this trace-width-calculator ). I am using GND polygon for 2 layer (My PCB has 2 layer)...
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Altium - Polygon pour into a cutout
I'm using Altium Designer 22 to design a PCB. On the top layer I have a ground plane with a hole in the middle. I made the hole by using a polygon cutout. Now, I have to pour into this cutout region ...
