Lattice FPGA - JTAG Programming 6Pin VS 10Pin

Question

I'm using a Lattice MachXO3LF FPGA, specifically the LCMXO3LF-4300E-5MG121I, and I want program it using JTAG and the HW-USBN-2B programming cable from Lattice. In the Programming Cable Users Guide, it shows the following figure and table for which shows what pins to use. (Link to the Guide) : https://www.latticesemi.com/view_document?document_id=143

I also plan to use the TC-LATTICE adapter from Tag-Connect to help program the FPGA. They have a short article showing options for using a 6pin or 10pin cable. (Link to article) : https://www.tag-connect.com/debugger-cable-selection-installation-instructions/lattice-hw-usbn-2b#286_219_146

My question is what is the difference between using the 6pin or 10pin setup? Can I really program/configure the FPGA using just the 6pin setup? I also don't think the FPGA has all the pins needed for the 10pin.

Here are additional links if needed. (Data Sheet) : https://www.latticesemi.com/view_document?document_id=50121 (Pin Migration) : https://www.latticesemi.com/view_document?document_id=50652

Thank you!

Answer 1

My question is what is the difference between using the 6pin or 10pin setup?

The additional pins for 10pin are 5V, DONE, TRST, ispEN/PROG/SN. The latter are so called SDM_PORT. They can be used for better understanding the actual bootup (See "MachXO3 Programming and Configuration Usage Guide" - "Technical Note TN1279" for details). But they are not essential for programming.

Can I really program/configure the FPGA using just the 6pin setup?

May I ask what your endgoal is? If it is about programming then answer is: Actually, you only need 4 wires to program a MachXO3LF if you use the I2C interface (SCL+SDA+VDD+GND). However, care must be taken to select the proper settings for the Feature Row (I2C has to be selected as active programming port) and the EFB Module with I2C for primary configuration has always to be instanced in the designs.

I also don't think the FPGA has all the pins needed for the 10pin.

According to my Lattice Diamond the following pins are available on the 121 BGA.

D4  FIO:PT28D   DONE        
C3  FIO:PT28C   INITN       
C4  FIO:PT23D   PROGRAMN        
C7  FIO:PT15C   TCK/TEST_CLK
A8  FIO:PT13D   TDI/MD7
D7  FIO:PT13C   TDO
C6  FIO:PT15D   TMS

TRST can be connected to the GSR. 5V OUT There is no predefined reset pin for the machxo3 family. It can be freely assigned. Many pins have multiple assignments. This is especially true for the smaller packages.

For Details see the already mentioned "Technical Note TN1279".