Questions tagged [computer-architecture]
Questions about the organization and design of computer hardware.
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        I am looking for confirmation on Formalism and Formatting, towards holographical computation [closed]
                    I am attempting to formalize the following correctly and would appreciate confirmation on this very basic slice.
Lattice:
Size: N x N x N
Periodic boundaries (3-torus)
Fields at each site x in ...
                
            
       
        
            
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        Clean-out of redundant code, towards holographic computation
                    I am attempting to formalize this structural lattice math;
Mathematical Formalism
Let $\Lambda$ be a finite cubic lattice of size $N \times N \times N$ with periodic boundary conditions, isomorphic to ...
                
            
       
        
            
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        What is Amazon outage? [closed]
                    An AWS outage occurs when one or more AWS regions or services fail, often due to network, power, or configuration issues — leading to downtime, slow performance, or inaccessibility of cloud-hosted ...
                
            
       
        
            
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        On a micro-architectural level, why is using a temporary variable faster than using XOR to swap two variables?
                    I've done some very basic bench marking for the following:
...
                
            
       
        
            
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        velocity single cycle vs multicycle datapath
                    In a mock exam for my CS course in computer architecture there is the question: "explain why the multicycle datapath is faster than the single cycle datapath."
The TA wrote the answer:
"...
                
            
       
        
            
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        Can you have a RAM array interpret code by it self or does a control unit need to exist?
                    I have read Charles Petzold's Code: The Hidden Language of Computer Hardware and Software. On page 200 and onwards he introduces two RAM arrays called code and data. The code RAM array have ...
                
            
       
        
            
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        Using block size, associativity and cache size to find the length of offset and index
                    From my understanding:
A block is the size of the smallest unit stored by the cache (normally a collection of words due to spatial locality). The block size is the number of bytes per block.
A set is ...
                
            
       
        
            
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        Possible Error in Tanenbaum - Structured Computer Organization
                    In sec 2.1.6 where he talks about Processor Level Parallelism, he mentions an example of Nvidia Fermi GPU.
Modern graphics processing units (GPUs) heavily rely on SIMD
processing to provide massive ...
                
            
       
        
            
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        Recommended study resources for Computer Architecture: RTL, Basic Computer Design, Microprogrammed Control, and CPU design
                    I'm currently studying Computer Architecture / Computer Organization, and I'm struggling to find resources to understand a few specific topics.
These are the four areas I’m focusing on:
Register ...
                
            
       
        
            
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        Data Hazards and Stalls with Forwarding in a Pipelined CPU (MIPS-like Pipeline)
                    I am currently studying pipelined CPU architectures, specifically focusing on data hazards and forwarding. I have a question regarding stalls in a 5-stage pipeline with forwarding.
Consider the ...
                
            
       
        
            
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        Arguments for 128-bit processors now (or even a 96-bit)
                    If one asks why we have not evolved to 128-bit processors, there is a whole set of discussions seemingly from the glass half empty crowd as to why we would not need such massive CPU data addressing ...
                
            
       
        
            
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        Should "16MB × 64-bit DRAM" be interpreted as Mega-Bytes or Mega-Words?
                    In a DRAM architecture problem, I’m given:
DRAM: 16MB × 64-bit
DRAM chip: 512KB × 4-bit
My professor repeatedly referred to these as Mega-Bytes and Kilo-Bytes, but ...
                
            
       
        
            
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        Question about data path dependencies in a program
                    I cannot understand solution to the problem 5.5 in "Computer Systems: Programmers Perspective". I this chapter it cover microarchitecture based optimizations and data path dependency. As a ...
                
            
       
        
            
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        General-Purpose Electronic Analog Computer Example?
                    I'm curious as to whether there are any functional examples of or research about General-Purpose Analog Computers out there at the moment.
So any computing system that can:
store pure analog values
...
                
            
       
        
            
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        How does processor differentiate from signed and unsigned integers overflow and carry
                    since unsigned and signed integers uses same components to compute then how does the overflow and carry flags are set?
                
            
       
         
         
         
        