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TinyDumbCPU

This is a multiple cycle CPU which is meant to execute (almost) unmodified Brainf*ck source code.

Bear in mind, this is a messy learning SystemVerilog project. Review greatly appreciated.

Usage

Simulation

You need:

  • Verilator
  • python3
  • A C++17 compiler (for the Verilator simulation)

For *nix, use ./run.sh /path/to/a/brainfsck/source.b.
This will compile the design using Verilator, map your source file and execute it.

Status

  • Can run mandelbrot compiled through bfcompiler and tested with Verilator.
  • Implemented for the C5G board (Cyclone V GX Starter Kit).
  • Character input unimplemented.

Instruction set

The instruction set is identical to that of Brainf*ck. However, the source has to be preprocessed and mapped by bfcompiler into a file that can be read by $readmemb.

Gallery

Executing the famous mandelbrot program on the C5G board:

mandel.b under TDCPU, C5G

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Brainf**k hardware implementation written in SystemVerilog

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