0
$\begingroup$

Now I am working on a fault-tolerant logical state preparation with some post-selections using Stim. Fault tolerance requires that $s (\geq t)$ faults result in at most weight-$s$ errors for both $X$ and $Z$ errors.

When preparing $|\bar{0}>$ state, even though $Z$ errors do not lead to a logical error, they can break fault tolerance, so we have to verify that the state is fault tolerant also for $Z$ errors. However, at the end of the circuit, we perform $X$ destructive measurements to check a logical $X$ errors, in which case $Z$ errors are not visible. How can we check fault tolerance for both $X$ and $Z$ errors?

In principle, we can check how faults propagate for all patterns of faults and can verify fault tolerance, but it is not scalable. The way to check fault tolerance for $Z$ errors should be scalable such as Monte Carlo simulation and see the scaling of logical error rates.

Improve this question
$\endgroup$
8
  • $\begingroup$ What do you mean by "not leading to logical error but breaking fault tolerance"? Perhaps you mean that memory experiments only checks one type of logical error since the state is known and not a general state? $\endgroup$ Commented Jun 23 at 11:55
  • $\begingroup$ In a memory experiment where you measure in the $Z$ basis at the end of the circuit, even if $s(\geq t) \ Z$ faults cause weight-more-than-$s$ Z residual errors, you cannot realize them. However, if you apply transversal CNOT gate afterwards, for example, then these $Z$ errors will propagate to the other code block and become harmful. Then, the state preparation procedure should be fault-tolerant for both $X$ and $Z$ errors even in $|\bar{0}>$ state preparation. $\endgroup$ Commented Jun 23 at 12:14
  • $\begingroup$ @Ian Z errors on a Z init don't break fault tolerance. If you do a cnot gate and it turns Z errors on a Z init into a logical error, then you're doing something wrong in how you decode your cnot gate. $\endgroup$ Commented Jun 23 at 15:06
  • $\begingroup$ @CraigGidney In Section VI of journals.aps.org/prxquantum/pdf/10.1103/PRXQuantum.6.020330, what I mean is detailed. Even in logical 0 preparation, if 1 Z fault leads to 2 Z errors, for example, it violates the fault tolerance condition. Do you agree with that? $\endgroup$ Commented Jun 24 at 3:26
  • $\begingroup$ @Ian No, I don't agree with that. I disagree with the notion that "fault tolerance" means a circuit should have the same distance as an approximation of the circuit (the "code"). Fault tolerance means the ability to tolerate faults; and just because an approximation can tolerate more faults doesn't mean the real thing can't tolerate some. $\endgroup$ Commented Jun 24 at 3:56

0

Reset to default

Start asking to get answers

Find the answer to your question by asking.

Ask question

Explore related questions

See similar questions with these tags.