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I am building a reverse polarity protection circuit by adding a PMOS onto the High side of the circuit. However, the PCB I'm building is way too small for a large heatsink to sink >20A of continuous current on 24V. I'm thinking on a NMOS on low side since the voltage switching is 0V and less heat shall be generated?

Here's my theory

$$ P = VI $$

so high side switching should generate more heat since I'm switching 24V and when I'm switching on a low side I'm switching 0V?

Went through falstad to prove this and it was kinda true -- the PMOS in high side configuration was dissipating ~60W and the NMOS in low side config was dissipating only milliwatts of heat.

But, $$ P = I^2R $$

The Joule heating formula tells us the otherwise, since the current flowing to ground and from source is the same, so the heat generation should be the same?

Usually NMOS offers lower R(ds)ON too so I thought it could also be beneficial too,I guess? And since I'm working on a battery operated system, even the ground potential is not quite the same, It should be fine.

Maybe I skipped a lesson or two -- and I'm a bit confused there

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    \$\begingroup\$ Show the two circuits (including part numbers and references) that you analysed. I'm sure that will demonstrate your error. \$\endgroup\$ Commented Oct 22 at 19:23

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The "V" in P = VI is the voltage across the device in question which, for a MOSFET, is set by its Rds(on). Substitute and rearrange to get I2R, so switching high side or low side won't matter vis-a-vis voltage, the current is the same, so Rds(on) is the controlling variable. Your P-ch device was probably connected incorrectly, likely in a source-follower configuration so it was never fully saturated, or you simulated with some itty-bitty P-ch with Rds(on) ≈ 10Ω.

You are correct in that N-channel MOSFETs generally have lower Rds(on) for a similar size/cost device due to the higher mobility of electrons compared to holes (and the associated economies of scale due to the greater popularity of N-ch devices). Switching ground while leaving the positive supply connected can sometimes lead to unintended and usually unwanted consequences as non-obvious paths to ground can be present through device I/O lines, for example. Only a careful and thorough analysis of your circuit can rule this out entirely.

If it turns out you can't use low-side switching, some options are:

  • Use a higher-performance P-ch device that has a lower Rds(on). You certainly have enough gate voltage swing available with 24V (you will probably need to divide this down).
  • Use an ideal diode controller with back-to-back N-ch devices.
  • Use a polarized connector and accept that damage may occur if reverse polarity is applied.
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Other things being equal, if properly driven, with a sufficient Vgs of the appropriate polarity, a 'common source' connected highside PMOS or a lowside NMOS will dissipate the same amount of heat. In both cases, the RDSon of the FET will generate a few mV to few 10s of mV across the FET due to current flow, with negligible dissipation.

A common error is to connect a MOSFET (of either polarity) in 'source follower' or 'common drain' configuration, which will result in a whole Vgs_th across the FET, often several volts, resulting in lots of dissipation.

Usually an NMOS has slightly better performance than an equivalent cost PMOS, so are generally preferred when there is an option.

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High side power switches are pretty common so there is a plethora of p-channel MOSFETs on the market that are optimized for this purpose, despite solid-state physics dictating a slight advantage in favour of n-channel. With MOSFETs there is a trade-off between Vds(max) and Rds(on) and by making low voltage p-channel MOSFETs the Rds(on) can be made quite small. That is more of a factor for +5V or +3.3V supplies rather than your 24V.

In general we usually would prefer a high-side switch in most instances, all other things being equal, however they are not. Typically we need a more complex circuit for the high-side switch, but in the case of a logic-level signal driving a MOSFET capable of efficiently switching 24V @ 20A you may need similarly complex circuits in each case (voltage shifting to 10-12V gate drive- but less than 24V since that exceeds the maximum for many parts- and often a driver circuit that can handle at least a few hundred mA gate current to get the MOSFET to switch smartly).

Here are the typical Rds(on) vs Vgs characteristics for a typical n-channel MOSFET (p-channel will be similar with signs opposite).

enter image description here

Note carefully that these are not guarantees and that the characteristic is quoted at 25℃ die temperature, which is unrealistic for 20A continuous- and Rds(on) may increase by more than 50% when hot. Still, you can reasonably count on the Rds(on) being less than about 2mΩ. That represents power loss of 0.8W which is quite acceptable for this part. It's essential to switch the MOSFET quickly with that magnitude of load- the instantaneous power dissipation will reach 120W with a resistive load and approaching 500W with an inductive load. There are also non-thermal (SOA) limitations.

TL;DR:

  1. Your circuit must have Vgs (voltage measured from the MOSFET gate to the MOSFET source, not ground or some other point) adequate to turn the MOSFET fully on. Typically 10-12V for "on" or close to zero for "off".

  2. It should make that switching transition relatively quickly to prevent unpleasantries such as excessive heating and MOSFET failure.

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It's all about the achievable Rds(on). And Rds(on) decreases with increased gate-source voltage (at least until the gate oxide breaks down.)

A low-side solution with an n-FET can use the input rail to get Vgs at least as high as the input voltage. Likewise, a high-side p-FET with its source tied to the input voltage can get a similarly large Vgs. In both cases, you get the best Rds(on) possible given your available Vgs.

Comparing the two, n-FETs have a small advantage over p-FETs in terms of Rds(on) vs. physical size of the die itself. This is mostly hidden in the package however.

I suppose it comes down to how you want ground to behave. If you need good ground connection use a suitable p-FET on Vin, and mind the body diode (you'll want to connect the source to the load, not Vin.) If you don't care about ground being the same as power supply return, use an n-FET in the return. More here: Reverse Polarity Voltage Protection Using P-MOSFET

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  • \$\begingroup\$ Rdson is not proportional to Vgs; that would imply increasing Vgs causes Rdson to increase. (It's not inversely proportional either, as that would imply a linear relationship, but that's closer to correct at least.) \$\endgroup\$ Commented Oct 23 at 1:56
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As others stated, N-channel FETs have lower on resistance and usually cheaper than P-channel FETs.
Low-side protection can be risky due to other ground referenced connections to the circuit.

If you can't use a low-side configuration, Texas Instruments has the LM74610 and LM74500 controller ICs that drives an external N-channel FET and acts as a high-side reverse polarity protection circuit. Good up to 42 V for the LM75610 and 60 V for the LM74500. Down side is it adds about USD 2.30 to the circuit cost in small quantities.

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