Should Vce or Vc be set to half Vcc when setting the Q_point of an NPN BJT?

You haven't selected Simon's answer. I'm not sure if I can add something that will help. But I'll take a shot at it. I'll dig right in rather than spend time on the underlying theory.

Let's choose an ideal situation where \$I_{_\text{E}}=I_{_\text{C}}\$ (\$I_{_\text{B}}=0\:\text{A}\$):

^{simulate this circuit – Schematic created using CircuitLab}

It's not often taught (I've yet to see it in a textbook), but to avoid getting lost in the weeds it may help to ignore the idea of quiescent current \$I_{_{\text{C}({q})}}\$ and to also ignore those resistors. Instead, combine the resistors and the quiescent current and treat only their voltage drops. For now, think only about \$V_{_{\text{RC}({q})}}=I_{_{\text{C}({q})}}\cdot R_{_\text{C}}\$ and \$V_{_{\text{RE}({q})}}=I_{_{\text{C}({q})}}\cdot R_{_\text{E}}\$.

You said that \$v_{_{\text{PK}({out})}}=2\:\text{V}\$ (peak) and that \$v_{_{\text{PK}({in})}}=200\:\text{mV}\$. It follows that \$A_v=-10\$ (the sign is just to represent the inversion of the input phase relative to the output phase, by \$180^\circ\$.) I'll also assume (it's not clear from your writing) that \$v_{_{\text{PP}({out})}}=4\:\text{V}\$ (peak-to-peak.)

You mention \$V_{_\text{CC}}=9\:\text{V}\$. What next springs to my mind is then an alkaline battery system. Looking at this datasheet, I would choose a \$2\:\text{V}\$ range of operation. From experience, I know a fresh battery has a little more than \$9\:\text{V}\$ present. So for design purposes, I'll use \$7.2\:\text{V}\le V_{_\text{CC}}\le 9.2\:\text{V}\$.

I'll start by using the worst case of \$V_{_\text{CC}}=7.2\:\text{V}\$, set \$V_T=28\:\text{mV}\$, and ensure that \$V_{_{\text{CE}({min})}}\ge 1.2\:\text{V}\$.

$$V_{_{\text{RC}({q})}}=\frac{V_{_\text{CC}}-V_{_{\text{CE}({min})}}+V_T}{1+\frac1{A_v}}-v_{_{\text{PK}({out})}}=3.48\:\text{V}$$

It follows that \$V_{_{\text{RE}({q})}}=\frac{V_{_{\text{RC}({q})}}}{A_v}-V_T=320\:\text{mV}\$.

And it is here that I run into a serious problem. I already know that \$v_{_{\text{PK}({in})}}=200\:\text{mV}\$. But also that variability of \$V_{_\text{BE}}\$ within a family of small signal bipolars may be \$\pm 50\:\text{mV}\$ and that an operating temperature range from \$-20^\circ\text{C}\$ to \$+55^\circ\text{C}\$ could mean another \$\pm 90\:\text{mV}\$. Taken with the signal itself, this means I need at least \$340\:\text{mV}\$. And it's not there.

So this means changing gears. The new situation will be:

^{simulate this circuit}

With a new concept: \$V_{_{\text{RX}({q})}}=I_{_{\text{C}({q})}}\cdot R_{_\text{X}}\$. This allows me to put down some voltage padding in order to accommodate part variation, temperature changes, as well as signal. In this case, I'll set \$V_{_{\text{RX}({q})}}=604\:\text{mV}\$ (for a convenient resistor value, later.)

Here, I find:

$$V_{_{\text{RC}({q})}}=\frac{V_{_\text{CC}}-V_{_{\text{RX}({q})}}-V_{_{\text{CE}({min})}}+V_T}{1+\frac1{A_v}}-v_{_{\text{PK}({out})}}\approx 2.931\:\text{V}$$

It follows that \$V_{_{\text{RE}({q})}}=\frac{V_{_{\text{RC}({q})}}}{A_v}-V_T=265.1\:\text{mV}\$.

Choosing \$I_{_{\text{C}({q})}}=1\:\text{mA}\$ and E96 (1%) values, this means \$R_{_\text{C}}=2.94\:\text{k}\Omega\$, \$R_{_\text{E}}=267\:\Omega\$, and that \$R_{_\text{X}}=604\:\Omega\$.

(Note that instead of choosing \$I_{_{\text{C}({q})}}\$ as the starting point, I might just as well have started by choosing \$R_{_\text{C}}\$. Which of these two would drive the design would depend on design details.)

Those values are fine. But now I need to add a few details to finish this. For example, assume \$V_{_\text{BE}}\approx 675\:\text{mV}\$ and \$\beta=150\$, this suggests a base voltage of \$\approx 1.55\:\text{V}\$. From there I might select \$R_{_\text{B1}}=51.1\:\text{k}\Omega\$ and \$R_{_\text{B2}}=15.4\:\text{k}\Omega\$.

That's all done for the lowest supply voltage.

I'll now operate the schematic at \$V_{_\text{CC}}=7.2\:\text{V}\$, \$V_{_\text{CC}}=8.2\:\text{V}\$, and \$V_{_\text{CC}}=9.2\:\text{V}\$, and sweep through all the temperatures from \$-20^\circ\text{C}\$ to \$-55^\circ\text{C}\$, 5 degrees per step.

Let's see:

That's impossibly close to the target \$A_v\$ for just such a simple design process. And the THD is below 2% in all cases, as well.

I didn't consider setting the collector voltage to half the supply rail. The process I chose takes a lot into account and allows me to isolate (as well as sum up) the impacts of temperature, part variation, and changes in \$V_{_\text{CC}}\$ and make rational decisions about whether or not a specific situation requires \$R_{_\text{X}}\$.

appendix

Abstraction can be a powerful tool and I had intended to show more about the above design method (from old notes.)

First off, the initial KVL looks like this:

$$\begin{align*} V_{_\text{C}}=V_{_\text{CC}}-I_{_{\text{C}({q})}}\cdot R_{_\text{C}}&=V_{_\text{E}}+V_{_{\text{CE}({min})}}+v_{_{\text{PK}({out})}}+v_{_{\text{PK}({in})}} \end{align*}$$

This just expresses the idea that the collector voltage is equal to the emitter voltage, plus a minimum limit on the bipolar transistor's collector-to-emitter voltage, plus the peak output signal. (It must also include the applied input signal, which accounts for the final term.)

There are some interesting developments. Let me introduce some standard equations that can be easily found in the literature:

$$\begin{align*} A_v&=-\frac{v_{_{\text{PK}({out})}}}{v_{_{\text{PK}({in})}}}=-\frac{R_{_\text{C}}}{R_{_\text{E}}+r_e^{\:'}}&\implies R_{_\text{E}}&=\frac{R_{_\text{C}}}{\vert A_v\vert}-r_e^{\:'} \\\\ r_e^{\:'}&=\frac{V_T}{I_{_{\text{C}({q})}}}&\implies V_T&=I_{_{\text{C}({q})}}\cdot r_e^{\:'} \end{align*}$$

We can restate the above KVL now:

$$\begin{align*} V_{_\text{CC}}-I_{_{\text{C}({q})}}\cdot R_{_\text{C}}&=I_{_{\text{C}({q})}}\cdot R_{_\text{E}}+V_{_{\text{CE}({min})}}+v_{_{\text{PK}({out})}}+v_{_{\text{PK}({in})}} \\\\ V_{_\text{CC}}-I_{_{\text{C}({q})}}\cdot R_{_\text{C}}&=I_{_{\text{C}({q})}}\cdot R_{_\text{E}}+V_{_{\text{CE}({min})}}+v_{_{\text{PK}({out})}}\cdot\left(1+\frac1{\vert A_v\vert}\right) \\\\ &=I_{_{\text{C}({q})}}\cdot \left(\frac{R_{_\text{C}}}{\vert A_v\vert}-r_e^{\:'}\right)+V_{_{\text{CE}({min})}}+v_{_{\text{PK}({out})}}\cdot\left(1+\frac1{\vert A_v\vert}\right) \\\\ &=I_{_{\text{C}({q})}}\cdot\frac{R_{_\text{C}}}{\vert A_v\vert}-I_{_{\text{C}({q})}}\cdot r_e^{\:'}+V_{_{\text{CE}({min})}}+v_{_{\text{PK}({out})}}\cdot\left(1+\frac1{\vert A_v\vert}\right) \\\\ &=\frac1{\vert A_v\vert}\cdot I_{_{\text{C}({q})}}\cdot R_{_\text{C}}-V_T+V_{_{\text{CE}({min})}}+v_{_{\text{PK}({out})}}\cdot\left(1+\frac1{\vert A_v\vert}\right) \\\\ &\text{re-arranging now, find:} \\\\ V_{_{\text{RC}({q})}}=I_{_{\text{C}({q})}}\cdot R_{_\text{C}}&=\frac{V_{_\text{CC}}-V_{_{\text{CE}({min})}}+V_T}{1+\frac1{\vert A_v\vert}}-v_{_{\text{PK}({out})}} \end{align*}$$

Despite the earlier ideal assumption that \$I_{_{\text{E}({q})}}=I_{_{\text{C}({q})}}\$ the result here avoids any loss of generality over the definition of \$r_e^{\:'}\$ by recovering \$V_T\$.

Also note that it doesn't specify either \$I_{_{\text{C}({q})}}\$ or \$R_{_\text{C}}\$. Only their product.

This is a useful abstraction for analysis and design.

I leave the remaining equation, when involving \$R_{_\text{X}}\$, for exploration. But the above shows how it may help to rise a little bit above worrying too quickly over specific values of \$I_{_{\text{C}({q})}}\$ or \$R_{_\text{C}}\$. That comes later. Keeping them temporarily conflated has value. Then, at the final moment of design, one can either select \$I_{_{\text{C}({q})}}\$ or \$R_{_\text{C}}\$, depending on the specific design requirements, as the tool to crack open the earlier abstraction.

Using your example of 0.2V to 2V, which is a gain of 10, you might choose \$R_E=1k\Omega\$ and \$R_C=10R_E=10k\Omega\$:

^{simulate this circuit – Schematic created using CircuitLab}

The three circuits are identical, with the exception of biasing provided by sources V2, V4 and V6. They each offset the AC input signal by a different DC amount, to place collector Q-point \$V_C\$ at different DC potentials. On the left, I've chosen V2 to set \$V_C=+4.5V\$, shown on VM1. The other two have their collectors close to the positive supply and negative supply respectively. Here are the outputs OUT1 (blue), OUT2 (orange) and OUT3 (brown) when the AC input signal is ±0.2V:

As you can see, all of them amplify correctly, but clipping occurs for the center and right circuits, due to their Q-points being so close to the supply potentials. The middle circuit's Q-point is too high, \$V_C\$ cannot rise beyond +9V, resulting in the tops of the waveform being clipped to that maximum. On the right, Q-point is too low, \$V_C\$ is unable to fall below +0.9V or so, and the bottoms are clipped.

The only version that does not clip is the left one, in which the chosen collector Q-point is far enough from either supply potential to permit the output to swing upwards and downwards without getting anywhere near +9V or +0.9V, and without clipping occurring at those levels.

We are taught that in these class A designs, quiescent collector potential should be half-way between the supplies, but that's not optimal. To ensure that the collector has as much room to swing upwards as it has to swing downwards, you should determine the collector's maximum and minimum possible potentials, and place the quiescent level at the mid-point of those extremes. The highest possible collector potential will of course be \$V_{CC}=+9V\$ here, when the transistor is completely "off". The lowest occurs with the transistor is completely "on", saturated, nearly a "short-circuit" between collector and emitter. These two conditions can be modelled roughly as follows:

^{simulate this circuit}

Therefore, the ideal quiescent collector potential would not be +4.5V, rather it would be half-way between +9V and +0.8V:

$$ V_C = \frac{9V + 0.8V}{2} \approx 5V $$

^{simulate this circuit}