The fundamental formula for a Hamming coding is as below:
2^k≥n+k+1
Where k = # of parity bits and n = data bits
In a DDR system with ECC feature, every data byte will generate an additional ECC bit which makes a byte data 9 bits long.
However, if simply applying the Hamming code formula here, 8 bits of data will require 4 parity bits which will make the encoded data 12 bits long.
In this case, how can the DDR ECC feature be realized with the Hamming coding scheme?
The ECC is not performed on an individual byte basis.
Usually, 8 bytes are combined with one parity bit per byte. Giving a total of 72 bits.
Since only 7 parity bits are needed to correct single-bit errors and 8 are available the extra bit can be used to detect double bit errors, although not correct the error.
DDR4 is not byte accessable. Each address has 64 bits or 8 bytes. The ECC makes each symbol 72 bits wide.
2^7 ≥ 64+7+1. When ECC is used for DDR RAM, there are usually a multiple of 9 chips (usually 9 chips with 8 bits per chip). Thus, there are 72 bits available: 64 bits for the data, 7 bits for the Hamming code and 1 bit which is often used as a parity bit to detect double bit errors.
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as far as I know, ECC with DDRam only can correct single bit errors.
