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so when doing digital design, lets say building a calculator we only take the 2s complement of a negative number.

13+(-12)=1
001101 + 110100 = (1)000001
the 1 in parenthesis is overflow that "falls off"

what is the design so that negative numbers are converted into a 2s complement?

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  • $\begingroup$ "what is the design so that negative numbers are converted into a 2s complement?" What do you mean ?? What is "the design" ??? $\endgroup$ Commented Jul 25, 2022 at 10:32

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First thing, the 1 in the parenthesis is overflow that "falls off" is wrong. Overflow may occur when you add same sign numbers or subtract opposite sign numbers.

As far as the design is concerned, the cpu handles it automatically when the operands are signed integers(when you write something like a = -1). For floating point numbers, we have the IEEE-754 notation. Since 2's complement is just 1's complement + 1 (not the exact mathematical definition but works in this case), the cpu can use some instructions like complementing all the bits(bitwise negation) and handling the addition or like scanning the bits from LSB to MSB till the first occurence of 1 and then inverting the remaining bits.

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  • $\begingroup$ The carry out bit is discarded so I don't think it is wrong to say that it "falls off". It is different from unsigned addition where carry out indicates an overflow. With signed addition you would instead detect overflow by checking the sign of the sum. $\endgroup$ Commented Jul 25, 2022 at 1:53
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There are two common types of numbers which are directly handled by CPUs: integers and floating-point numbers.

Integers are stored using two's complement. This means that an $n$-bit integer is stored using $n$ bits. The interpretation of these $n$ bits depends on whether you think of them as representing signed integers (in which case the MSB is the sign bit) or unsigned integers. When performing operations on integers, you typically tell the CPU whether to treat them as signed or unsigned; this makes a difference in some, but not all, cases.

In contrast, floating-point integers have an explicit sign bit. Two's complement might be used internally when implementing arithmetic on them, but that's an implementation detail.

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    $\begingroup$ Fun fact: One's complement is occasionally used internally when implementing arithmetic on floating point numbers. The difference between two's complement and one's complement is 1ulp, and for some converging iterative algorithms this tiny difference doesn't matter, and a parallel "not" is much faster than adding 1ulp. But yes, implementation detail. $\endgroup$ Commented Feb 24, 2022 at 8:12
  • $\begingroup$ For example, 16 + 16 bit addition, subtraction or multiplication give precisely the same bit pattern as a result whether you treat the numbers as two unsigned integers with an unsigned integer result, or as two 2s complement integers with a 2s complement result. A check "is x ≥ y" would give different results. A compare instruction will often result in one flag "x ≥ y if you assume they are unsigned", and another flag "x ≥ y if you assume they are two's complement". $\endgroup$ Commented Aug 24, 2022 at 12:27
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All common CPU's do use the 2's complement representation. Because they need to handle negative values and because the sign/mantissa representation is less convenient.

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