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(Q57760087)
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Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors
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instance of
scholarly article
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title
Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors
(English)
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author name string
Claudio Machado Diniz
series ordinal
1
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Mateus Beck Fonseca
series ordinal
2
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Eduardo Costa
series ordinal
3
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Sergio Bampi
series ordinal
4
0 references
publisher
Institute of Electrical and Electronics Engineers
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publication date
June 2015
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language of work or name
English
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Identifiers
DOI
10.1109/NEWCAS.2015.7182087
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DBLP publication ID
conf/newcas/DinizFCB15
1 reference
stated in
DBLP Dataset 2021-01-02
retrieved
28 January 2021
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