Silicon Graphics announced plans this week to release teraflop ccNUMA systems by the year 2000. Employing both MIPS and Intel IA-64 microprocessor technologies, the company seems confident in it’s ability to “shatter the limits on scaling, shared memory and interconnect performance.” To learn how, HPCwire interviewed Ben Passarelli, product line manager, high-end servers, Silicon Graphics, Inc.

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HPCwire: Can you provide our readership with some technical details of the upcoming ccNUMA system?

PASSARELLI: The new systems will be our second generation of commercial ccNUMA systems. We will build on the features that have made the current Origin systems successful in high performance computing, namely: very large, high performance global memory system; system bandwidth that scales as the system grows; ccnUMA (Non-uniform with a little “n”): scalable system architecture with low-latency and no “speed bumps”; and the system handles both SMP and message passing codes with equal ease tuned libraries, state-of-the art compilers, very high performance I/O subsystems.

The new systems will support scaling to 512 microprocessors in a single shared memory system and will feature enhancements to memory system bandwidth to support three generations of microprocessors – MIPS, Merced and McKinley. Larger configurations will be supported via GSN (Gigabyte System Network) clusters.

HPCwire: For those currently using SGI’s ccNUMA systems, how difficult is it going to be to upgrade to Merced of McKinley processors? Please explain the process.

PASSARELLI: Any complexity associated with the transition is associated with software. From a hardware standpoint, it couldn’t be easier – a MIPS CPU module (of 2 to 4 CPUs and memory) is replaced by a Merced or McKinley module. When upgrading from MIPS to Merced or McKinley there is an ISA transition which will require installation of a version of IRIX compiled for IA-64 (compiled from same source code base as MIPS) and applications to be recompiled.

Early adopters and performance oriented-customers are the most likely to move to Merced immediately. We will also be working with our suppliers of high performance codes to have a wide portfolio of applications available at introduction. For customers who are more conservative and are dependent on a wider variety of applications and middleware (commercial users) we are making MIPS processors and enhancements available for an extended period of time, up until the time of McKinley introduction. This will allow our customers to choose when they want to make the transition to IA-64. Since most of our customers are performance driven, we have opted for an extended MIPS roadmap to ease the transition over attempting instruction set emulation – which would introduce an unacceptable performance penalty for our users.

In the course of the upgrade, all investments in I/O and storage are preserved along with the investment in the system infrastructure (interconnect, power, cooling, etc.)

For users of our current line of Origin systems, applications will move without recompilation to the MIPs version of the next generation system.

HPCwire: Do you foresee any greater difficulties maintaining a single-system image with the Merced modules as opposed to the traditional MIPS ones? Why or why not?

PASSARELLI: From your question, it sounds like you appreciate the difference between a single system image and a cluster of systems. We’ve figured out how to make the MIPS and IA-64 work on a common system interconnect/memory system. Systems using any of the three microprocessor families will leverage the same mature 64-bit IRIX OS that has been proven to scale to hundreds of processors already. We’re designing our scalable interconnection mindful of the memory bandwidths that will be required to keep a system full of processors, such as McKinley, constantly fed with data. Having already delivered a proven ccNUMA system gives us an advantage over vendors who are just moving to ccNUMA – our task is to *evolve* the most successful high performance system architecture to a new level of performance and continue to innovate on features in support of production high-performance environments.

HPCwire: Who do you think might challenge Silicon Graphics in the area?

PASSARELLI: For customers who benefit from large processor counts, the competition is IBM with their SP systems. These systems are really clusters of small systems that use message passing to communicate between nodes. They have been able to deliver high processor count solutions for applications that have course-grained parallelism. By scaling ccNUMA systems up, we can support both message passing and shared memory model applications and also run mulitple jobs simultaneously (characteristic of a production environment over a purely research environment). For customers who need more than 512 processors, we will support clusters using our Gigabyte System Network (GSN).

We believe that clusters of larger systems present an easier programming model and better performance over clusters of small nodes.

We also compete with Digital – Digital is second to SGI in market share in the technical high performance market and has a shot at delivering a CPU with good floating point performance. Their scaling of systems has been limited, however, and their system performance has always lagged the capability of the processor they could deliver. The potential of their processors have also been limited by not being able to run cache components at the speed of their processors.

We keep an eye on Sun, only because they’ve been very noisy about wanting to get into the technical market. With only 3% market share, no 64-bit OS and no optimizing compilers, they have a long row to hoe to even become a serious entrant in high performance technical computing. As we leverage our high performance systems into analytical SBA (Strategic Business Analysis) applications, we’ll see them on the low-end.

HPCwire: I understand you’ve just returned from the Cray Users Group/Origin Workshop meeting…..what sort of response did the plan get?

PASSARELLI: They’re excited about us reinforcing our commitment to high-performance computing and our plans to deliver new product platforms that will allow them to persist at “solving the world’s toughest problems”. Many of our customers run production environments and believe that our ccNUMA systems will allow them to run a much wider range of applications with management overhead than clusters. They instantly thought of new applications that the systems could enable – for instance, instead of just simulating the effect of a crash on a car, they could start looking at the effects of a crash on the occupants for a particular design. Another attendee was thinking about the 1000’s of airframe design variants he could simulate in the time it takes him to schedule wind tunnel time. Another attendee was thinking about what this would mean for modeling world economies or analyzing millions of point-of-sale transactions. In short, the new systems go beyond allowing more calcualtions to be performed, but will allow our customers to tackle problems they would never have otherwise attempted.

HPCwire: Is there anything else you’d like the readership to be aware of?

PASSARELLI: IDC just reported that we’re number one in share for high performance technical computing – we plan to continue our focus on delivering solutions to our installed base. We believe high performance computing is a growth area and we believe that it can be expanded by making high-performance systems even more accessible – by delivering the highest performance for even less money, making systems that are easy to program, and delivering solutions that are easy to manage and have the RAS features needed for production environments. We’re excited about helping our customers solve the world’s toughest problems. The new systems will support multiple pipes of our renowned graphics. We believe visualization is fundamental to reducing “time to insight”.