Dynamic Instrumentation Tool Platform
SST Architectural Simulation Components and Libraries
A C++11 simulator for a variety of CDN caching policies.
A low-latency LRU approximation cache in C++ using CLOCK second-chance algorithm. Multi level cache too. Up to 2.5 billion lookups per second.
Haystack is an analytical cache model that given a program computes the number of cache misses.
cache analysis platform developed at Emory University and CMU
Source code for the evaluated benchmarks and proposed cache management technique, GRASP, in [Faldu et al., HPCA'20].
This cache simulator is used in order to simulate substitutions in cache using replacement policies (FIFO and LRU) and write back into the cache (using the write-allocate policy).
Computer architecture project : Cache simulator with LRU replacement policy
A graphics tracing and replay framework to explore system-level effects on heterogeneous CPU+GPU memory systems.
Contains implementations of cache-optimized and external memory algorithms.
OpenGraph is an open-source graph processing benchmarking suite written in pure C/OpenMP. Integrated with Sniper simulator.
A survey on architectural simulators focused on CPU caches.
Computer architecture related projects
Set of MIPS assembly programs to help us find a secret cache configuration (cache size, block size and associativity).
Direct Mapped and N-Way set associative cache Simulator in C/C++ for L1 cache in Processors
Source code for the evaluated benchmarks and proposed cache management technique, GRASP, in [Faldu et al., HPCA'20].
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