sifive

Freedom U Software Development Kit (FUSDK)

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn't define TrustZone-like primitives to provide hardware separation. To shield critical functionality from untrusted third-party components, MultiZone provides hardware-enforced, software-defined separation of multiple equally secure worlds. Unlike antiquated hypervisor-like solutions, MultiZone is self-contained, presents an extremely small attack surface, and it is policy driven, meaning that no coding is required – and in fact even allowed. MultiZone works with any 32-bit or 64-bit RISC-V processors with standard Physical Memory Protection unit (PMP) and “U” mode.

A short tutorial on how to build and test embedded software using the IAR C/C++ Compiler alongside CMake.

SiFive OpenEmbedded / Yocto BSP Layer

RISC-V Debugger

RISCV port of the Slackware distribution

SiFive: development platform for PlatformIO

SiFive's Freedom e300 for the DECA Max10 FPGA

Archived, please use official SiFive dev/platform

Play and learn with the SiFive HiFive1 board featuring a FE310-G000 SoC integrating SiFive's E31 RISC-V core.

Reverse engineer of the hifive1 rev b bootloader since the source has not been released

Bare Bones OSDev template for the HiFive-1 RISC-V board from SiFive!

OSdev exploration

RISC-V Engine Emulator

Stuff related to RISC-V

A custom development board for the SiFive FE310, a RISC-V microcontroller.

hIMUdev is a RISC-V powered IMU evaluation board

Read and write a memory-mapped SiFive system-on-chip UART