Reducing the barrier to silicon at Zero ASIC. Formerly @ DARPA, Adapteva, Analog Devices, Texas Instruments.
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Zero ASIC Corporation
- Cambridge, MA, USA
- www.zeroasic.com
- @zeroasic
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- 2 discussions answered
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3,575 contributions in the last year
Contribution activity
June 2022
Created 74 commits in 4 repositories
Created 1 repository
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aolofsson/awesome-opensource-hardware
Python
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Reviewed 21 pull requests in 1 repository
siliconcompiler/siliconcompiler
21 pull requests
- Set 'flowcontinue' on heartbeat_padring top level
- Make Python error handling more consistent
- Update yosys error regex
- Make the yosys and klayout tool drivers less strict, to accommodate custom flows.
- Make chip.show() file search more flexible
- Adjust behavior of ['tool', <tool>, 'continue'] to always fail on fatal error
- Allow tool tasks to have more than one input
- Remove unused tool driver
- Use tool regexes to populate errors/warnings
- Update 0.9.1 changelog
- Fix Verilator compile support, clean up driver
- Add VPR submodule
- Reorganize/refactor Sphinx extensions
- Prepare 0.9.1 release
- Add final tool CLI options to record schema
- Return filepath from chip.archive()
- Use jobname parameter instead of 'job0' in sc-show
- Noah/manifest view
- Fix up ['tool', <tool>, 'regex', ...] help message
- Fix up CSV manifest export
- Enhance TCL manifest generation
Created an issue in idea-fasoc/OpenFASOC that received 4 comments
Large files
Perhaps not a big issue, but the repo is >800M...seems excessive. Might be worth a large file clean (saw a large mp4 in there for example): repos/Oβ¦
4
comments
Opened 1 other issue in 1 repository
siliconcompiler/siliconcompiler
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Jun 2 β Jun 29




