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soc
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The SOC Analysts all-in-one CLI tool to automate and speed up workflow.
python
dns
security
workflow
automation
analysis
phishing
hash
cybersecurity
soc
security-automation
analysts
urlscan
reputation-check
proofpoint-decoder
soc-analysts
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Dec 1, 2021 - Python
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
boom
rocket
rocket-chip
chip-generator
chisel
riscv
rtl
peripherals
soc
out-of-order
superscalar
risc-v
firesim
accelerators
chipyard
hwacha
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Jan 14, 2022 - C
The extensible bootloader for embedded system with application engine, write once, run everywhere.
mtk
lua
os
boot
embedded-systems
operating-system
rockchip
samsung
bootloader
soc
freescale
allwinner
xboot
application-engine
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Jan 5, 2022 - C
open-source
microcontroller
fpga
processor
vhdl
gcc
customizable
msp430
soc
soft-core
system-on-chip
msp430-gcc
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Nov 23, 2021 - VHDL
PatrowlHears - Vulnerability Intelligence Center / Exploits
api
automation
threat
secops
cybersecurity
exploits
threat-hunting
vulnerabilities
threatintel
cve
cpe
vulnerability-detection
soc
vulnerability-identification
cvss
threat-intelligence
vulnerability-scanning
patrowl
exploits-scripts
vulnerability-intelligence
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Jan 13, 2022 - Python
Code generation tool for configuration and status registers
asic
fpga
vhdl
eda
rtl
verilog
csr
systemverilog
soc
uvm
ral
axi
amba
apb
register-descriptions
uvm-ral-model
uvm-register-model
wiki-documents
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Jan 14, 2022 - Ruby
Contains information about accepted GSoC 2017 Projects across various organizations along with the proposals.
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Mar 24, 2018
Azure Sentinel 4 SecOps
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Dec 28, 2021 - PowerShell
学习安全运营的记录 | The knowledge base of security operation
wiki
cybersecurity
knowledge-base
soc
threat-analysis
security-analysis
security-operations
security-operation
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Jan 10, 2022 - HTML
Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator used in FireSim.
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Nov 24, 2019 - C
CMU 18545 FPGA project -- Multi-channel ultrasound data acquisition and beamforming system.
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Apr 27, 2016 - Verilog
Given a job title and job description, the algorithm assigns a standard occupational classification (SOC) code to the job.
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Oct 27, 2021 - Python
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With CAF 0.18, actor names must be constant strings. The active and passive partition carry their human-readable name in the variable
self->state.namealready.In
active_partition.cppandpassive_partition.cppwe currently have a lot of log messages using the actor name rather than the human-readable partition name. We need to change them like this:VAST_DEBUG("{} persists p