pulp-platform / snitch
Lean but mean RISC-V system!

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Lean but mean RISC-V system!
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
SPI protocol Accelerated VIP
Kria KV260 Vitis platforms and overlays
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
RISC-V Debug Support for our PULP RISC-V Cores
AXI X-Bar
[UNRELEASED] FP div/sqrt unit for transprecision
OpenTitan: Open source silicon root of trust
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.