openroad

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Here are 12 public repositories matching this topic...

google / skywater-pdk

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Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

magic asic eda pdk asic-library openroad openram skywater

Updated Jan 5, 2022
Python

The-OpenROAD-Project / OpenLane

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OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

Updated Feb 14, 2022
Verilog

The-OpenROAD-Project / OpenROAD

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OpenROAD's unified application implementing an RTL-to-GDS Flow

cpp tcl eda rtl verilog def gdsii timing-analysis openroad lef opendb-database

Updated Feb 14, 2022
Verilog

efabless / caravel_mpw-one

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Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

magic yosys caravel picorv32 openroad openram sky130

Updated Dec 17, 2021
Verilog

efabless / caravel

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Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

magic yosys caravel picorv32 openroad vexriscv openram sky130

Updated Feb 12, 2022
Verilog

The-OpenROAD-Project / OpenROAD-Cloud

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The source code that empowers OpenROAD Cloud

automation eda cloud-computing brown-university openroad scale-lab

Updated Jun 29, 2020

The-OpenROAD-Project / EDAAC

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EDA Analytics Central

analytics electronic-design-automation openroad

Updated Jun 4, 2020
Python

aasthadave9 / Advanced-Physical-Design-Using-OpenLANE-Sky130

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This repository documents my work from the Advanced Physical Design Using OpenLANE/Sky130 Workshop conducted by VLSI System Design. The objective of this workshop project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130

linux open-source asic hardware vlsi-physical-design openroad rtl2gds openlane sky130