systemc

Thanks for taking the time to report this.

What would you like added/supported?

// File: dly_warning.sv

// verilator lint_off ASSIGNDLY

module dly_warning (
    input logic a_in,
    input logic [2:0] delaycw,

    output logic a_out
);

timeunit 1ns;
timeprecision 1ns;

time dly;

assign dly = 5 * delaycw;
assign #dly a_out = a_in;     // Warning ASS

Using the SystemC statement

head = (head + 1) % 3;

causes the PrintITL to print the line

at t_end: head = ((1 + head_at_t)(31 downto 0) mod 3)(31 downto 0);

in the respective property. Onespin reports this line with the following output:

-E- FIFO.vhi:119:58 Slice expression is out of range.
type: unsigned(1 downto 0)
slice: 31 downto 0
: at t_end: from_re