#
mips
Here are 771 public repositories matching this topic...
Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings.
security
arm
framework
mips
x86-64
ethereum
reverse-engineering
disassembler
webassembly
riscv
x86
arm64
sparc
m68k
powerpc
systemz
bpf
m0s65xx
m680x
tms320c64x
-
Updated
Mar 7, 2021 - C
Plasma is an interactive disassembler for x86/ARM/MIPS. It can generates indented pseudo-code with colored syntax.
-
Updated
May 16, 2020 - Python
Tengine is a lite, high performance, modular inference engine for embedded device
machine-learning
arm
mips
tensorflow
x86-64
cuda
acl
cnn
pytorch
artificial-intelligence
tensorrt
onnx
npu
-
Updated
Mar 8, 2021 - C
Binary Analysis Platform
emulator
security
arm
mips
static-analysis
ocaml
reverse-engineering
disassembler
symbolic-execution
bap
x86
dynamic-analysis
binary-analysis
instruction-semantics
program-analysis
taint-analysis
powerpc
program-verification
lifter
-
Updated
Mar 8, 2021 - OCaml
The OpenSource Disassembler
linux
arm
cplusplus
cross-platform
mips
esp32
reverse-engineering
disassembler
qt5
ida
ida-pro
dalvik
binary-analysis
espressif
xtensa
dex
idapro
esp32-idf
-
Updated
Feb 27, 2021 - C++
Simple C compiler
-
Updated
Dec 9, 2020 - C
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
-
Updated
Jul 7, 2020 - SystemVerilog
C--compiler which implements LL(1)\LR(0)\SLR\LR(1) and semantic analysis and MIPS generate
-
Updated
Nov 30, 2019 - Python
Simple and lightweight source-based multi-platform Linux distribution with musl libc.
linux
fast
distribution
arm
privacy
cross-platform
simple
mips
linux-distribution
x86
cross-compiler
safe
musl
musl-libc
powerpc
compact
risc-v
-
Updated
Mar 8, 2021 - Shell
OpenWrt Project Node.js packages. v10.x LTS and v12.x LTS and v14.x LTS
nodejs
iot
arm
mips
homebridge
openwrt
node-red
node-modules
node-module
nodejs-modules
aws-iot
aarch64
openwrt-package
openwrt-feed
mipsel
zigbee2mqtt
aws-iot-nodejs
aws-crt-nodejs
aws-crt
-
Updated
Mar 9, 2021 - Makefile
Cross complie shadowsocks for UBNT devices based on mipsel or mips64
-
Updated
Mar 22, 2020 - Shell
A curated list of Nintendo 64 development resources including toolchains, documentation, emulators, and more
c
rust
gamedev
documentation
awesome
nintendo
tools
mips
asm
game-development
assembler
development-kit
resources
cartridge
mips-assembly
awesome-list
rom
n64
nintendo-64
assembly-programming
-
Updated
Mar 8, 2021 - Python
Improve this page
Add a description, image, and links to the mips topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the mips topic, visit your repo's landing page and select "manage topics."


Some RISC-V instructions perform writes to 2 destinations, either 2 register or register or program counter. In cases if the source of one sub-operation matches a destination of another one, the order of result output is important. The examples are
jalrand instruction operating with CSRs:riscv/riscv-tests#258
riscv/riscv-tests#263
Your obj