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pulp-platform / axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

SystemVerilog 213 73 Built by @accuminium @suehtamacv @zarubaf @bluewww @olofk 1 stars today
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pulp-platform / fpnew

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

SystemVerilog 98 32 Built by @stmach @zarubaf @fabianschuiki @florent-gwt @accuminium 0 stars today