Pinned Loading

1. Ripes Public

   A graphical processor simulator and assembly editor for the RISC-V ISA

   C++ 751 116

2. VSRTL Public

   Visual Simulation of Register Transfer Logic

   C++ 43 8

3. leros-dev/leros-llvm Public

   Forked from llvm-mirror/llvm

   Port of the LLVM Compiler Infrastructure for the Leros ISA

   LLVM 5 2

4. VelonaCore Public

   A VHDL implementation of a single-cycle Leros core

   VHDL 3 4