Package system managers' build commands, such as makepkg, git clone a new copy of this repo in a clean temporal path, checkout a specific version, proceed with the build, and remove the temporal dir. I'm using the prepare() step, which is executed just before the build, to copy subdir testsuite out of the temporal path; so it can be executed later, after the path is removed.

The procedu

What would be workflow for creating and installing external haskell packages? I am running snap from release 1.2. I used to work with cabal in past, but I am out of loop on current packet management in new environment.

Any pointers would be much appreciated.

This is the first RISCV core I've been able to get up and running without breaking my head. Much appreciation for the SpinalHDL team for the making this work with Qsys and Avalon. :) (Although SpinalHDL itself puzzling still.)

Where should notes and documentation go? (Is there a wiki?) There's a lot of little things I had to figure out. It would be nice to make it easy to post the notes. One ex

Our Makefile.ghdl doesn't have the usual | tee $(SIM_BUILD)/sim.log at the end of the simulation command line nor any other option to that effect, so it doesn't produce a sim.log file at all.

VUnit.add_source_files_from_csv() only passes vhdl_standard kwarg to Library.add_source_file(). However, my file gatherer uses .ahd file extensions to denote altera, .xhd to denote xilinx, and so on. I need the file_type available at least so I can tell VUnit that those file types are still vhdl, but all arguments should be available.

The Sphinx documentation flow was extended by several sphinx and third party extensions. These extensions should be documented along with their modifications. A comprehensive syntax guide should be assembled, to collect all syntax notations at one place instead of dozens of third party documentation websites with partially poor usage descriptions.

Extensions list:

• Standard Sphinx extensi

At the moment we enter at 0x0, but we probably should enter at the system reset vector of 0x100. We can modify existing software to handle both entry points, and eventually change Microwatt.

Here is a simple example for Vivado.

https://github.com/SymbiFlow/fpga-tool-perf/blob/f8438d0447ae808fd1434073b037fa30b274c423/fpgaperf.py#L444-L506

    def vivado_resources(self):
        report_path = self.out_dir + "/" + self.project_name + ".runs/impl_1/top_utilization_placed.rpt"
        with open(report_path, 'r') as fp:
            report_data = fp.read()
            repo

Create NeoVim integration of VHDL language server and publish instructions on how to use it.

Add command line option, to enable the user to choose which builder he/she wants to use. Suggestion:
--builder BUILDER specify the builded to be used

By adding it, it would allow:

1. Users to actively choose the builder the way to use, without any code change (e.g. editing hdl_checker/builder_utils.py).
2. to separate use cases and make it easier to track bugs that may arise.

Add documentation about the firmware image

• basic login, accessing the camera over serial or ssh
• basic scripts and camera tools
• installing software and updating the image / software
• wifi / ethernet connection
• how to add your own software

Do we also need documentation for basic linux tasks like creating a user or the basic unix commands (cd, ls, rm, etc.)?
I think we should

The MMU should issue an mmu trap if the instruction clearing the 'mmu trap enable' bit (bit 9 in ssr0) itself causes a trap. The 11/70 documentation clearly describes this behavior.

This is the reason why test 063 of the ekbee1 diagnostics currently fails.

Since the MMU trap mechanism is is only available on 11/45 and 11/70, but not in the J11, it is not used by common operating systems.