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@Metalab @openscad @SymbiFlow @YosysHQ
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1,117 contributions in the last year

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Contribution activity

May 2020

Created a pull request in YosysHQ/yosys that received 1 comment

Add support for non-power-of-two mem chunks in verific importer

Test case: module test ( input logic clock, input logic reset, input logic [0:0] A, input logic [1:0] B, input logic [2:0] C, input logic [15:0] di…

+12 −2 1 comment

Created an issue in upscale-project/cosa2 that received 2 comments

Build broken with latest smt-switch

Looks like makaimann/smt-switch@4858959 broke cosa2 build. This worked as a quick-and-dirty work-around for me: diff --git a/contrib/setup-smt-swit…

2 comments
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