Design Self-Study Matbi's Practical HW Accelerator Design Using FPGA (From LED Control to Fully Connected Layer Accelerator Design)

Having only experienced Verilog design and verification in testbenches, I needed an environment where I could verify on actual HW. I knew Vivado provided even the bitstream generation function to upload to an FPGA, but I felt overwhelmed by how to use the features, and even from the moment I tried to purchase a board, I felt a lot of helplessness. To take Mabbi-nim's lecture, I selected a board, and by listening to the provided lecture, I was able to personally experience what HW design through FPGA is like, and what constraints exist in actual, non-ideal HW (such as the process for meeting Timing via STA). Now that I've completed the lecture (it took quite a long time as I was juggling it with undergraduate classes...), I plan to thoroughly review each part, building both my HW design capabilities and SW capabilities to use Vitis. At the undergraduate level, it's difficult to use Synopsys or Cadence Tool, but since my school offered a lecture providing Frontend Tool, after trying them all, I found that aside from DFT, Vivado can practically cover almost everything. Therefore, I believe it would be very beneficial for those aspiring to ASIC design to take this course as well. Thank you for providing such a great lecture. As soon as I complete the XUP labs, I will return for Verilog Season 2 to gain a deeper understanding of AMBA AXI.

2024/08/31/Sat 15:40 I listened to the lecture well. When using a computer, I had many questions such as what is a CPU? What is H/W? How do you make H/W? After listening to the lecture, I understood a lot. I am not a H/W developer. I am aiming for S/W development. I am currently a complete beginner in S/W. T.T So, I am listening to many lectures on inflearn. I have registered for 3 of Design Self-study's lectures. I am hesitating because the AXI4 lecture has a set period of attendance. Since I am not in the H/W field, I think I can attend the lecture right away and watch it a year later. I saw the announcement of a new lecture on YouTube. If you make a new lecture, if the period of attendance is "unlimited", I think I will register for the lecture right away. This is my opinion. For those who are aiming for H/W design, it seems like it would be a good idea to decide on a good course period (if there is a gap period, those who applied will be able to attend all of the courses within that period). I learned a lot from today's really good lecture. Thank you. Have a nice day. ^^;;

This is a course that deserves 5 points. It seems to teach well so that you can approach it more familiarly by doing real designs that are not taught in school. I am still in the learning stage for employment, but I think that the experience of applying the projects learned here and putting them on the board is the most important specification for me. Although it is difficult, I will try to understand it by continuing to look at it and run to the end.

I took the course from S1 to FPGA1. It was really helpful. It was fun and meaningful to see the actual results using FPGA. I learned that there are many more basic functions provided by Vivado than I thought, and I am learning how to use them. And I am the type who asks a lot of questions, so I was grateful that you always answered them well. One thing that was disappointing: As a result, there was no lab that succeeded in actual HW acceleration, so I was a little disappointed in terms of accomplishment. I am grateful to have acquired the concept and base of HW accelerators. See you in another lecture:)

This lecture is so informative and helpful. It is a lecture that can help you understand the overall structure of FPGA. I started with Verilog, but it was good to be able to study the basics that I missed again!! (I highly recommend it!!) I majored in design and was worried about what I would do if I couldn't do it, but the explanation was so kind that it helped me understand. Since I only studied with Altera, I couldn't do any Xilinx projects, but after watching this lecture, I learned the overall usage of the data bus, quickly adapted to creating and testing IPs, and was able to proceed with the project. It helped me study everything from the basics to the important parts. Thank you!!!!! Of course, it will also be very helpful to those who have only encountered Xilinx.

I learned a lot about how to use FPGAs by uploading the contents coded in Verilog to the FPGA board and running them in vitis repeatedly in each lecture. And when I was studying Season 1, while designing various modules using Verilog, I kept wondering, "Where can I use Counter, Bram, and other things I've learned?" But this time, the best thing was that the purpose of learning FPGA became clearer as I understood the concept of HW acceleration.

This course goes beyond making alarm clocks and pianos to I/F, memory control, and hardware acceleration. It is definitely more difficult than Season 1, but I recommend this course to those who want to learn knowledge that they can't learn in school!

I was suddenly assigned to FPGA work and was at a loss, but this seems to have helped me a lot. Thank you.