See How does this Makefile makes C program without even specifying a compiler? for background. Make has built-in rules which tell it how to build various files; in this particular case, since you’re asking for an object file, and there’s a matching .cpp file in the current directory, it uses the rule which specifies how to build an object file from a .cpp file.
In GNU Make, certain parts of that rule end up using variables; in particular, CXX for the C++ compiler, and CXXFLAGS for the flags to use when compiling C++ code. If the environment contains values for those variables, those values take precedence over the built-in defaults. Since CXX is still set to clang++-5.0, Make tries to use that to build Demo.o.
With your two-line Makefile, the recipe you define doesn’t get used because its prerequisites don’t all exist and can’t all be made. Instead, the generic pattern rule gets used again, still with CXX set to clang++-5.0.
You can disable built-in rules entirely with the -r option to make. You can also supplement them; thus
Demo.o: Demo.cpp xxx.h
with no recipe will use the built-in rule, but require xxx.h in addition to Demo.cpp (and correctly fail since xxx.h doesn’t exist and can’t be built).