Skip to main content
Unix & Linux

You are not logged in. Your edit will be placed in a queue until it is peer reviewed.

We welcome edits that make the post easier to understand and more valuable for readers. Because community members review edits, please try to make the post substantially better than how you found it, for example, by fixing grammar or adding additional resources and hyperlinks.

Required fields*

20
  • 5
    @KingZoingo Make is in effect an inference engine of sorts: it has a set of rules (built-in and from the Makefile), existing artifacts (files in the current directory or named in the Makefile), and requested artifacts (targets in the Makefile); it simply tries to match rules and existing artifacts to determine whether it can use them to obtain the requested artifacts. The built-in rules tell it test.c can be used to produce test. make -d will show you the process in detail... Commented Nov 22, 2016 at 21:39
  • 5
    @Ho1 @StephenKitt This was been in make long before GNU or POSIX were invented. The first version was written nearly 40 years ago, and there were some prototype versions built from shell scripts even before that. Commented Nov 23, 2016 at 1:07
  • 3
    @jamesqf CPP still invokes the preprocessor (cc -E typically); the C++ compiler is CXX. Commented Nov 23, 2016 at 5:22
  • 3
    @Ho1 CXX in this context is the Make variable, not a command — $(CXX) in a Makefile will be replaced by a command to run a C++ compiler. Commented Nov 23, 2016 at 10:47
  • 2
    make cares about extensions on Unix. make (and cc) is probably the main reason to actually care about extensions, in fact, since pattern rules are easier to use than writing the same rule for every source file. Commented Nov 24, 2016 at 3:47